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 Rev 0; 10/07
Stand-Alone Fuel-Gauge IC with LED Display Drivers
General Description
The DS2788 measures voltage, temperature, and current, and estimates available capacity for rechargeable lithium-ion (Li+) and Li+ polymer batteries. Cell characteristics and application parameters used in the calculations are stored in on-chip EEPROM. The available capacity registers report a conservative estimate of the amount of charge that can be removed given the current temperature, discharge rate, stored charge, and application parameters. Capacity estimation is reported in mAh remaining and percentage of full. LED display drivers and a debounced input make display of the capacity information easy. The LED pins can directly sink current, requiring only a resistor for setting the current in the LED display, thus reducing space and cost.
Features
Five 30mA Open-Drain Drivers for Driving LED Fuel-Gauge Display Debounced Fuel-Gauge Display Enable Internal Voltage Measurement Gain Register for Trimming External Voltage-Divider Pin for Driving FETs to Enable Voltage-Divider Only During Voltage Measurement, Conserving Power Precision Voltage, Temperature, and Current Measurement System Accurate, Temperature-Stable, Internal Time Base Absolute and Relative Capacity Estimated from Coulomb Count, Discharge Rate, Temperature, and Battery Cell Characteristics Accurate Warning of Low Battery Conditions Automatic Backup of Coulomb Count and Age Estimation to Nonvolatile (NV) EEPROM Gain and Tempco Calibration Allows the Use of Low-Cost Sense Resistors 24-Byte Battery/Application Parameter EEPROM 16-Byte User EEPROM Unique ID and Multidrop 1-Wire(R) Interface 14-Pin TSSOP Package
DS2788
Applications
Power Tools Electric Bicycles Electric Vehicles Uninterruptible Power Supply Digital Cameras
Pin Configuration
TOP VIEW
+ LED2 LED1 DVSS VDD OVD VSS DQ 1 2 3 4 5 6 7 14 13 12 LED3 LED4 LED5 PIO VIN SNS VMA
Ordering Information
PART DS2788E+ DS2788E+T&R TEMP RANGE -25C to +70C -25C to +70C PIN-PACKAGE 14 TSSOP 14 TSSOP
DS2788
11 10 9 8
+Denotes a lead-free package. T&R = Tape and reel.
TSSOP
Typical Operating Circuit appears at end of data sheet. 1-Wire is a registered trademark of Dallas Semiconductor Corp., a wholly owned subsidiary of Maxim Integrated Products, Inc.
________________________________________________________________ Maxim Integrated Products
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For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
Stand-Alone Fuel-Gauge IC with LED Display Drivers DS2788
ABSOLUTE MAXIMUM RATINGS
Voltage Range on Any Pin Relative to VSS..............-0.3V to +6.0V Voltage Range on VIN, VMA Relative to VSS ...-0.3V to VDD + 0.3V DVSS to VSS .....................................................................-0.3V to +0.3V LED1-5.................................................................60mA each pin Operating Temperature Range ...........................-40C to +85C Storage Temperature Range .............................-55C to +125C Soldering Temperature (10s) ................Refer to IPC/JEDEC-020 Specification.
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
RECOMMENDED DC OPERATING CHARACTERISTICS
(VDD = 2.5V to 5.5V, TA = -25C to +70C, unless otherwise noted. Typical values are at TA = +25C.)
PARAMETER Supply Voltage VIN, VMA Voltage Range DQ, PIO, OVD, LED1-LED5 Voltage Range SYMBOL VDD (Note 1) (Note 1) (Note 1) CONDITIONS MIN +2.5 0 0 TYP MAX +5.5 VDD +5.5 UNITS V V V
DC ELECTRICAL CHARACTERISTICS
(VDD = 2.5V to 5.5V, TA = -25C to +70C, unless otherwise noted. Typical values are at TA = +25C.)
PARAMETER ACTIVE Current SLEEP Mode Current Input Logic-High: DQ, PIO Input Logic-Low: DQ, PIO Output Logic-Low: DQ, PIO, VMA Output Logic-High: VMA VMA Precharge Time Pulldown Current: DQ, PIO Output Logic-Low: LED1-LED5 Input Logic-High: OVD Input Logic-Low: OVD VIN Input Resistance DQ SLEEP Timeout Undervoltage SLEEP Threshold PIO Switch Debounce LED1 Display Blink Rate LED Display-On Time 50% duty cycle SYMBOL IACTIVE I SLEEP VIH VIL VOL VOH tPRE I PD VOL VIH VIL RIN t SLEEP VSLEEP DQ < VIL (Note 1) VDQ, VPIO = 0.4V I OL = -30mA (Note 1) (Note 1) (Note 1) 15 1.8 2.40 100 0.9 3.6 1.0 4.0 2.0 2.45 2.2 2.50 130 1.1 4.4 VDD 0.2 VSS + 0.2 (Note 1) (Note 1) I OL = 4mA (Note 1) I OH = 1mA (Note 1) VDD 0.5 13.3 0.2 14.2 5 1 1.5 0.6 0.4 2.5V VDD CONDITIONS 4.2V MIN TYP 70 1 MAX 95 105 3 UNITS A A V V V V ms A V V V M s V ms Hz s
2
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Stand-Alone Fuel-Gauge IC with LED Display Drivers
ELECTRICAL CHARACTERISTICS: TEMPERATURE, VOLTAGE, CURRENT
(VCC = 2.5V to 5.5V, TA = -25C to +70C, unless otherwise noted. Typical values are at TA = +25C.)
PARAMETER Temperature Resolution Temperature Error Voltage Resolution Voltage Full-Scale Voltage Error Current Resolution Current Full-Scale Current Gain Error Current Offset Error Accumulated Current Offset SYMBOL TLSB T ERR VLSB VFS VERR ILSB IFS I GERR I OERR qOERR (Note 2) 0C TA +70C, 2.5V (Notes 3, 4) VDD 4.2V 4.2V, -7.82 -188 1.56 51.2 1 +12.5 0 1 VDD 4.2V 2 3 % 0 4.88 4.992 50 CONDITIONS MIN TYP 0.125 3 MAX UNITS C C mV V mV V mV % Full Scale V Vhr/ day
DS2788
0C TA +70C, 2.5V VDD VSNS = VSS (Notes 3, 4, 5) VDD = 3.8V, TA = +25C 0C TA +70C, 2.5V
Timebase Error
t ERR
ELECTRICAL CHARACTERISTICS: 1-Wire INTERFACE, STANDARD
(VCC = 2.5V to 5.5V, TA = -25C to +70C.)
PARAMETER Time Slot Recovery Time Write-0 Low Time Write-1 Low Time Read Data Valid Reset-Time High Reset-Time Low Presence-Detect High Presence-Detect Low SYMBOL t SLOT tREC tLOW0 tLOW1 tRDV tRSTH tRSTL t PDH t PDL 480 480 15 60 960 60 240 CONDITIONS MIN 60 1 60 1 120 15 15 TYP MAX 120 UNITS s s s s s s s s s
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Stand-Alone Fuel-Gauge IC with LED Display Drivers DS2788
ELECTRICAL CHARACTERISTICS: 1-Wire INTERFACE, OVERDRIVE
(VCC = 2.5V to 5.5V, TA = -25C to +70C.)
PARAMETER Time Slot Recovery Time Write-0 Low Time Write-1 Low Time Read Data Valid Reset-Time High Reset-Time Low Presence-Detect High Presence-Detect Low SYMBOL tSLOT tREC tLOW0 tLOW1 tRDV tRSTH tRSTL tPDH tPDL 48 48 2 8 80 6 24 CONDITIONS MIN 6 1 6 1 16 2 2 TYP MAX 16 UNITS s s s s s s s s s
EEPROM RELIABILITY SPECIFICATION
(VCC = 2.5V to 5.5V, TA = -25C to +70C, unless otherwise noted. Typical values are at TA = +25C.)
PARAMETER EEPROM Copy Time EEPROM Copy Endurance SYMBOL t EEC NEEC TA = +50C (Note 6) 50,000 CONDITIONS MIN TYP MAX 10 UNITS ms Cycles
Note 1: Note 2: Note 3: Note 4: Note 5: Note 6:
All voltages are referenced to VSS. Factory-calibrated accuracy. Higher accuracy can be achieved by in-system calibration by the user. Parameters guaranteed by design. At a constant regulated VDD voltage, the Current Offset Bias register can be used to obtain higher accuracy. Accumulation Bias register set to 00h. EEPROM data retention is 10 years at +50C.
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Stand-Alone Fuel-Gauge IC with LED Display Drivers
Pin Description
PIN 1 2 3 4 5 6 7 8 9 10 11 NAME LED2 LED1 DVSS VDD OVD VSS DQ VMA SNS VIN PIO FUNCTION Display Driver. Connect to an LED connected to VDD for display of relative pack capacity. Display Driver. Connect to an LED connected to VDD for display of relative pack capacity. Display Ground. Ground connection for the LED display drivers. Connect to VSS. Power-Supply Input. Connect to the positive terminal of the battery cell through a decoupling network. 1-Wire Bus Speed Control. Input logic level selects the speed of the 1-Wire bus. Logic 1 selects overdrive (OVD) and Logic 0 selects standard (STD) timing. On a multidrop bus, all devices must operate at the same speed. Device Ground. Connect directly to the negative terminal of the battery cell. Connect the sense resistor between VSS and SNS. Data Input/Output. 1-Wire data line, open-drain output driver. Connect this pin to the DATA terminal of the battery pack. This pin has a weak internal pulldown (IPD) for sensing pack disconnection from host or charger. Voltage Measurement Active. Output is driven high before the start of a voltage conversion and driven low at the end of the conversion cycle. Sense Resistor Connection. Connect to the negative terminal of the battery pack. Connect the sense resistor between VSS and SNS. Voltage Sense Input. The voltage of the battery cell is monitored through this input pin. Programmable I/O Pin. Can be configured as input or output to monitor or control user-defined external circuitry. Output driver is open drain. This pin has a weak internal pulldown (IPD). When configured as an input, upon recognition of a rising edge, the fuel-gauge display is enabled. Display Driver. Connect to an LED connected to VDD for display of relative pack capacity. Leave floating in LED4 configuration. Display Driver. Connect to an LED connected to VDD for display of relative pack capacity. Display Driver. Connect to an LED connected to VDD for display of relative pack capacity.
DS2788
12 13 14
LED5 LED4 LED3
VDD LED5 LED4 LED3 LED2 LED1 DVSS
EN VPOR PIO DQ OVD
BIAS/VREF
TIME BASE LED DRIVERS STATUS AND CONTROL
1-Wire INTERFACE
TEMP AND VOLTAGE ADC
VMA VIN
EEPROM
DS2788
SNS
ACCUMULATED CURRENT CURRENT ADC 15-BIT + SIGN
RATE AND TEMPERATURE COMPENSATION
VSS
Figure 1. Block Diagram
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Stand-Alone Fuel-Gauge IC with LED Display Drivers DS2788
Detailed Description
The DS2788 operates directly from 2.5V to 5.5V and supports single-cell Li+ battery packs. As shown in Figure 2, the DS2788 accommodates multicell applications by adding a trim register for calibration of an external voltage-divider for VIN. NV storage is provided for cell compensation and application parameters. Host-side development of fuel-gauging algorithms is eliminated. On-chip algorithms and convenient status reporting of operating conditions reduce the serial polling required of the host processor. Additionally, 16 bytes of EEPROM memory are made available for the exclusive use of the host system and/or pack manufacturer. The additional EEPROM memory can be used to facilitate battery lot and date tracking and NV storage of system or battery usage statistics. A 1-Wire interface provides serial communication at the standard 16kbps or overdrive 140kbps speeds, allowing access to data registers, control registers, and user memory. A unique, factory-programmed, 64-bit registration number (8-bit family code + 48-bit serial number + 8-bit CRC) assures that no two parts are alike and enables absolute traceability. The 1-Wire interface on the DS2788 supports multidrop capability so that multiple slave devices can be addressed with a single pin.
Power Modes
The DS2788 has two power modes: ACTIVE and SLEEP. On initial power-up, the DS2788 defaults to ACTIVE mode. While in ACTIVE mode, the DS2788 is fully functional with measurements and capacity estimation continuously updated. In SLEEP mode, the DS2788 conserves power by disabling measurement and capacity estimation functions, but preserves register contents. SLEEP mode is entered under two different conditions and an enable bit for each condition makes entry into SLEEP optional. SLEEP mode can be enabled using the power mode (PMOD) bit or the undervoltage enable (UVEN) bit. The PMOD type SLEEP is entered if the PMOD bit is set and DQ is low for tSLEEP (2s nominal). The condition of DQ low for tSLEEP can be used to detect a pack discon-
PK+ IN ENABLE 0.1F
MAX6765TTLD2+
RST OUT 330 LEDs LED1 LED2 LED3 LED4 LED5 150 DATA DQ SNS 5.6V RSNS 20m PKPIO VDD 330 330 330 330 BSS84 B3F-1000 10k 900k GND TIMEOUT 10k 10-CELL Li+ BATTERY
DS2788
VMA VIN OVD DVSS VSS 10F 0.1F
2N7002
100k
PROTECTION CIRCUIT
Figure 2. Multicell Application Example
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Stand-Alone Fuel-Gauge IC with LED Display Drivers
nection or system shutdown, in which no charge or discharge current flows. A PMOD SLEEP condition transitions back to ACTIVE mode when DQ is pulled high. The second option for entering SLEEP is an undervoltage condition. When the UVEN bit is set, the DS2788 transitions to SLEEP if the voltage on VIN is less than VSLEEP (2.45V nominal) and DQ is stable at a low or high logic level for tSLEEP. An undervoltage condition occurs when a pack is fully discharged, where loading on the battery should be minimized. UVEN SLEEP relieves the battery of the IACTIVE load until communication on DQ resumes. Note: PMOD and UVEN SLEEP features must be disabled when a battery is charged on an external charger that does not connect to the DQ pin. PMOD SLEEP can be used if the charger pulls DQ high. UVEN SLEEP can be used if the charger toggles DQ. The DS2788 remains in SLEEP and therefore does not measure or accumulate current when a battery is charged on a charger that fails to properly drive DQ. must be issued by the master as with PMOD SLEEP. If DQ was high when UVEN SLEEP was entered, then the DS2788 is prepared to receive a 1-Wire reset from the master. In the first two cases with DQ low during SLEEP, the DS2788 does not respond to the first rising edge of DQ with a presence pulse.
DS2788
Voltage Measurement
Battery voltage is measured at the V IN input with respect to VSS over a range of 0 to 4.992V, with a resolution of 4.88mV. The result is updated every 440ms and placed in the Voltage (VOLT) register in two's complement form. Voltages above the maximum register value are reported at the maximum value; voltages below the minimum register value are reported at the minimum value. Figure 3 shows the format of the Voltage register. VIN is usually connected to the positive terminal of a single-cell Li+ battery by a 1k resistor. The input impedance is sufficiently large (15M) to be connected to a high-impedance voltage-divider in order to support multiple-cell applications. The pack voltage should be divided by the number of series cells to present a single-cell average voltage to the VIN input. In Figure 2, the value of R can be up to 1M without incurring significant error due to input loading. The VMA pin is driven high tPRE before the voltage conversion begins. This allows an external switching element to enable the voltage-divider, and allows settling to occur before the start of the conversion.
Initiating Communication in Sleep
When beginning communication with a DS2788 in PMOD SLEEP, DQ must be pulled up first and then a 1-Wire reset pulse must be issued by the master. In UVEN SLEEP, the procedure depends on the state of DQ when UVEN SLEEP was entered. If DQ was low, DQ must be pulled up and then a 1-Wire reset pulse
VOLT MSB--ADDRESS 0Ch S MSb "S": SIGN BIT(S), "X": RESERVED 29 28 27 26 25 24 23 LSb 22 MSb 21 LSB--ADDRESS 0Dh 20 X X X
READ ONLY
X
X LSb
UNITS: 4.88mV
Figure 3. Voltage Register Format
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Stand-Alone Fuel-Gauge IC with LED Display Drivers DS2788
Temperature Measurement
The DS2788 uses an integrated temperature sensor to measure battery temperature with a resolution of 0.125C. Temperature measurements are updated every 440ms and placed in the Temperature (TEMP) register in two's complement form. Figure 4 shows the format of the Temperature register. between SNS and VSS is 51.2mV. The input linearly converts peak signal amplitudes up to 102.4mV as long as the continuous signal level (average over the conversion cycle period) does not exceed 51.2mV. The ADC samples the input differentially at 18.6kHz and updates the Current (CURRENT) register at the completion of each conversion cycle. The Current register is updated every 3.515s with the current conversion result in two's complement form. Charge currents above the maximum register value are reported at the maximum value (7FFFh = +51.2mV). Discharge currents below the minimum register value are reported at the minimum value (8000h = -51.2mV).
Current Measurement
In the ACTIVE mode of operation, the DS2788 continually measures the current flow into and out of the battery by measuring the voltage drop across a low-value current-sense resistor, RSNS. The voltage-sense range
TEMP MSB--ADDRESS 0Ah S MSb "S": SIGN BIT(S), "X": RESERVED 29 28 27 26 25 24 23 LSb 22 MSb 21 LSB--ADDRESS 0Bh 20 X X X
READ ONLY
X
X LSb
UNITS: 0.125C
Figure 4. Temperature Register Format
CURRENT MSB--ADDRESS 0Eh S MSb "S": SIGN BIT(S) CURRENT RESOLUTION (1 LSB) VSS - VSNS 1.5625V RSNS 20m 78.13A 15m 104.2A 10m 156.3A 5m 312.5A 214 213 212 211 210 29 28 LSb 27 MSb 26 LSB--ADDRESS 0Fh 25 24 23 22
READ ONLY
21
20 LSb
UNITS: 1.5625V/RSNS
Figure 5. Current Register Format
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Stand-Alone Fuel-Gauge IC with LED Display Drivers
Average Current Measurement
The Average Current (IAVG) register reports an average current level over the preceding 28 seconds. The register value is updated every 28s in two's complement form, and is the average of the eight preceding Current register updates. Figure 6 shows the format of the Average Current register. Charge currents above the maximum register value are reported at the maximum value (7FFFh = +51.2mV). Discharge currents below the minimum register value are reported at the minimum value (8000h = -51.2mV).
Current Offset Bias
The Current Offset Bias (COB) register allows a programmable offset value to be added to raw current measurements. The result of the raw current measurement plus COB is displayed as the current measurement result in the Current register, and is used for current accumulation. COB can be used to correct for a static offset error, or can be used to intentionally skew the current results and therefore the current accumulation. COB allows read and write access. Whenever the COB is written, the new value is applied to all subsequent current measurements. COB can be programmed in 1.56V steps to any value between +198.1V and 199.7V. The COB value is stored as a two's complement value in nonvolatile memory.
DS2788
Current Offset Correction
Every 1024th conversion the ADC measures its input offset to facilitate offset correction. Offset correction occurs approximately once per hour. The resulting correction factor is applied to the subsequent 1023 measurements. During the offset correction conversion, the ADC does not measure the sense resistor signal. A maximum error of 1/1024 in the Accumulated Current (ACR) register is possible; however, to reduce the error, the current measurement made just prior to the offset conversion is displayed in the Current register and is substituted for the dropped current measurement in the current accumulation process. This results in an accumulated current error due to offset correction of less than 1/1024.
Current Measurement Calibration
The DS2788's current measurement gain can be adjusted through the RSGAIN register, which is factorycalibrated to meet the data sheet specified accuracy. RSGAIN is user accessible and can be reprogrammed after module or pack manufacture to improve the current measurement accuracy. Adjusting RSGAIN can correct for variation in an external sense resistor's nominal value, and allows the use of low-cost, nonprecision
IAVG MSB--ADDRESS 08h S MSb "S": SIGN BIT(S) 214 213 212 211 210 29 28 LSb 27 MSb 26 LSB--ADDRESS 09h 25 24 23 22
READ ONLY
21
20 LSb
UNITS: 1.5625V/RSNS
Figure 6. Average Current Register Format
COB
ADDRESS 7Bh S MSb "S": SIGN BIT(S) 26 25 24 23 22 21 20 LSb UNITS: 1.56V/RSNS
R/W AND EE
Figure 7. Current Offset Bias Register Format
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Stand-Alone Fuel-Gauge IC with LED Display Drivers
current-sense resistors. RSGAIN is an 11-bit value stored in 2 bytes of the parameter EEPROM memory block. The RSGAIN value adjusts the gain from 0 to 1.999 in steps of 0.001 (precisely 2-10). The user must program RSGAIN cautiously to ensure accurate current measurement. When shipped from the factory, the gain calibration value is stored in two separate locations in the parameter EEPROM block: RSGAIN, which is reprogrammable, and FRSGAIN, which is read only. RSGAIN determines the gain used in the current measurement. The read-only FRSGAIN (address B0h and B1h) is provided to preserve the factory value only and is not used in the current measurement.
DS2788
the on-chip temperature sensor. If the current shunt is constructed with a copper PCB trace, run the trace under the DS2788 package if possible.
Current Accumulation
Current measurements are internally summed, or accumulated, at the completion of each conversion period with the results displayed in the ACR. The accuracy of the ACR is dependent on both the current measurement and the conversion time base. The ACR has a range of 0 to 409.6mVh with an LSb (least significant bit) of 6.25Vh. Additional read-only registers (ACRL) hold fractional results of each accumulation to avoid truncation errors. Accumulation of charge current above the maximum register value is reported at the maximum register value (7FFFh); conversely, accumulation of discharge current below the minimum register value is reported at the minimum value (8000h). Read and write access is allowed to the ACR. The ACR must be written MSB (most significant byte) first, then LSB (least significant byte). The write must be completed within 3.515s (one ACR register update period). A write to the ACR forces the ADC to perform an offset correction conversion and update the internal offset correction factor. Current measurement and accumulation begins with the second conversion following a write to the ACR. Writing the ACR clears the fractional values in ACRL. ACR's format is shown in Figure 8, and ACRL's format is shown in Figure 9. To preserve the ACR value in case of power loss, the ACR value is backed up to EEPROM. The ACR value is recovered from EEPROM on power-up. See the memory map in Table 3 for specific address location and backup frequency.
Sense Resistor Temperature Compensation
The DS2788 is capable of temperature compensating the current-sense resistor to correct for variation in a sense resistor's value over temperature. The DS2788 is factory programmed with the sense resistor temperature coefficient, RSTC, set to zero, which turns off the temperature compensation function. RSTC is user accessible and can be reprogrammed after module or pack manufacture to improve the current accuracy when using a high temperature coefficient current-sense resistor. RSTC is an 8-bit value stored in the parameter EEPROM memory block. The RSTC value sets the temperature coefficient from 0 to +7782ppm/C in steps of 30.5ppm/C. The user must program RSTC cautiously to ensure accurate current measurement. Temperature compensation adjustments are made when the Temperature register crosses 0.5C boundaries. The temperature compensation is most effective with the resistor placed as close as possible to the VSS terminal to optimize thermal coupling of the resistor to
ACR MSB--ADDRESS 10h 215 MSb 214 213 212 211 210 29 28 LSb 27 MSb 26 LSB--ADDRESS 11h 25 24 23 22
R/W AND EE
21
20 LSb
UNITS: 6.25Vh/RSNS
Figure 8. Accumulated Current Register (ACR) Format
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Stand-Alone Fuel-Gauge IC with LED Display Drivers DS2788
ACRL MSB--ADDRESS 12h 211 MSb "X": reserved ACR LSb VSS - VSNS 6.25Vh RSNS 20m 312.5Ah 15m 416.7Ah 10m 625Ah 5m 1.250mAh 210 29 28 27 26 25 24 LSb 23 MSb 22 LSB--ADDRESS 13h 21 20 X X X X LSb Units: 1.526nVHr/RSNS READ ONLY
ACR RANGE VSS - VSNS 409.6mVh RSNS 20m 20.48Ah 15m 27.30Ah 10m 40.96Ah 5m 81.92Ah
Figure 9. Fractional/Low Accumulated Current Register (ACRL) Format
AB
ADDRESS 61h S MSb "S": SIGN BIT(S) 26 25 24 23 22 21 20 LSb UNITS: 1.5625V/RSNS
EE
Figure 10. Accumulation Bias Register Formats
Current Blanking
The current blanking feature modifies the current measurement result prior to being accumulated in the ACR. Current blanking occurs conditionally when a current measurement (raw current + COB) falls in one of two defined ranges. The first range prevents charge currents less than 100V from being accumulated. The second range prevents discharge currents less than 25V in magnitude from being accumulated. Chargecurrent blanking is always performed, however, discharge-current blanking must be enabled by setting the NBEN bit in the Control register. See the register description for additional information.
Accumulation Bias
The Accumulation Bias (AB) register allows an arbitrary bias to be introduced into the current-accumulation process. The AB can be used to account for currents that do not flow through the sense resistor, estimate currents too small to measure, estimate battery self-discharge, or correct for static offset of the individual DS2788 device. The AB register allows a user-programmed positive or negative constant bias to be included in the current accumulation process. The user-programmed two's complement value, with bit weighting the same as the Current register, is added to the ACR once per current conversion cycle. The AB value is loaded on power-up from EEPROM memory. Figure 10 shows the format of the AB register.
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Stand-Alone Fuel-Gauge IC with LED Display Drivers DS2788
Capacity Estimation Algorithm
Remaining capacity estimation uses real-time measured values and stored parameters describing the cell characteristics and application operating limits. Figure 11 describes the algorithm inputs and outputs. point must be considered. Since the behavior of Li+ cells is nonlinear, these characteristics must be included in the capacity estimation to achieve an acceptable level of accuracy in the capacity estimation. The FuelPackTM method used in the DS2788 is described in general in Application Note AN131: Lithium-Ion Cell Fuel Gauging with Dallas Semiconductor Battery Monitor ICs. To facilitate efficient implementation in hardware, a modified version of the method outlined in AN131 is used to store cell characteristics in the DS2788. Full and empty points are retrieved in a lookup process that retraces piece-wise linear model consist-
Modeling Cell Stack Characteristics
To achieve reasonable accuracy in estimating remaining capacity, the cell stack performance characteristics over temperature, load current, and charge termination
VOLTAGE TEMPERATURE CURRENT ACCUMULATED CURRENT (ACR) (RW) AVERAGE CURRENT CELL PARAMETERS 16 BYTES (EEPROM)
(R) (R) CAPACITY LOOKUP (R) AVAILABLE CAPACITY CALCULATION ACR HOUSEKEEPING AGE ESTIMATOR (R) LEARN FUNCTION
FULL ACTIVE EMPTY
FULL(T) AE(T)
(R) (R) (R)
STANDBY EMPTY SE(T)
REMAINING ACTIVE ABSOLUTE CAPACITY (RAAC) mAh (R) REMAINING STANDBY ABSOLUTE CAPACITY (RSAC) mAh (R) REMAINING ACTIVE RELATIVE CAPACITY (RARC) % (R)
REMAINING STANDBY RELATIVE CAPACITY (RSRC) % (R)
AGING CAPACITY (AC) (2 BYTES EE) AGE SCALAR (AS) (1-BYTE EE) SENSE RESISTOR PRIME (RSNSP) (1 -BYTE EE) CHARGE VOLTAGE (VCHG) (1-BYTE EE) MINIMUM CHARGE CURRENT (IMIN) (1-BYTE EE) ACTIVE EMPTY VOLTAGE (VAE) (1-BYTE EE) ACTIVE EMPTY CURRENT (IAE) (1-BYTE EE)
Figure 11. Top Level Algorithm Diagram FuelPack is a trademark of Dallas Semiconductor Corp., a wholly owned subsidiary of Maxim Integrated Products, Inc.
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Stand-Alone Fuel-Gauge IC with LED Display Drivers
ing of three curves named full, active empty, and standby empty. Each model curve is constructed with five line segments, numbered 1 through 5. Above +50C, the segment 5 model curves extend infinitely with zero slope, approximating the nearly flat change in capacity of Li+ cells at temperatures above +50C. Segment 4 of each model curves originates at +50C on its upper end and extends downward in temperature to +25C. Segment 3 joins with segment 2, which in turn joins with segment 1. Segment 1 of each model curve extends from the junction with segment 2 to infinitely colder temperatures. Segment slopes are stored as Vh ppm change per C. The two junctions or breakpoints that join the segments (labeled TBP12 and TBP23 in Figure 12) are programmable in 1C increments from -128C to +25C. They are stored in two's complement format, TBP23 at 7Ch, and TBP12 at 7Dh. The slope or derivative for segments 1, 2, 3, and 4 are also programmable. Full: The full curve defines how the full point of a given cell stack depends on temperature for a given charge termination. The charge termination method used in the application is used to determine the table values. The DS2788 reconstructs the full line from cell characteristic table values to determine the full capacity of the battery at each temperature. Reconstruction occurs in onedegree temperature increments. Full values are stored as ppm change per C. For example, if a cell had a nominal capacity of 1214mAh at +50C, a full value of 1199mAh at +25C, and 1182mAh at 0C (TBP23), the slope for segment 3 would be: ((1199mAh - 1182mAh) / (1214mAh / 1M)) / (25C - 0C) = 560ppm/C 1 LSB of the slope registers equals 61ppm so the full segment 3 slope register (location 0x6Dh) would be programmed with a value of 0x09h. Each Slope register has a dynamic range 0ppm to 15555ppm.
DS2788
SEGMENT 1 100%
SEGMENT 2
SEGMENT 3
SEGMENT 4
SEGMENT 5
DERIVATIVE (ppm/C)
FULL
CELL CHARACTERIZATION ACTIVE EMPTY
STANDBY EMPTY
TBP12
TBP23
+25C
+50C
Figure 12. Cell Model Example Diagram
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Stand-Alone Fuel-Gauge IC with LED Display Drivers
Active Empty: The active empty curve defines the temperature variation in the empty point of the discharge profile based on a high-level load current (one that is sustained during a high-power operating mode) and the minimum voltage required for system operation. This load current is programmed as the active empty current (IAE), and should be a 3.5s average value to correspond to values read from the Current register and the specified minimum voltage, or active empty voltage (VAE) should be a 250ms average to correspond to values read from the Voltage register. The DS2788 reconstructs the active empty line from cell characteristic table values to determine the active empty capacity of the battery at each temperature. Reconstruction occurs in one-degree temperature increments. Active empty segment slopes are stored the same as described for the full segments. Standby Empty: The standby empty curve defines the temperature variation in the empty point in the discharge defined by the application standby current and the minimum voltage required for standby operation. Standby empty represents the point that the battery can no longer support a subset of the full application operation, such as memory data retention or organizer functions on a wireless handset. Standby empty segment slopes are stored the same as described for the full segments.
DS2788
The standby load current and voltage are used for determining the cell characteristics but are not programmed into the DS2788. The DS2788 reconstructs the standby empty line from cell characteristic table values to determine the standby empty capacity of the battery at each temperature. Reconstruction occurs in one-degree temperature increments.
Cell Stack Model Construction
The model is constructed with all points normalized to the fully charged state at +50C. The cell parameter EEPROM block stores the initial values, the +50C full value in mVh units, and the +50C active empty value as a fraction of the +50C value. Standby empty at +50C is by definition zero and therefore no storage is required. The slopes (derivatives) of the 4 segments for each model curve are also stored in the cell parameter EEPROM block along with the break point temperatures of each segment. Table 1 shows an example of data stored in this manner.
CELL MODEL PARAMETERS 15 BYTES (EEPROM) TEMPERATURE
FULL(T) LOOKUP FUNCTION AE(T) SE(T)
Figure 13. Lookup Function Diagram
Table 1. Example Cell Characterization Table (Normalized to +50C)
Manufacturer's Rated Cell Capacity: 1220mAh Charge Voltage: 4.2V Active Empty (V, I): 3.0V, 500mA Sense Resistor: 0.020 SEGMENT BREAKPOINTS TBP12 = -12C TBP23 = 0C +50C NOMINAL (mAh) 1214 SEGMENT 1 (ppm/C) 488 854 244 SEGMENT 2 (ppm/C) 549 1526 183 SEGMENT 3 (ppm/C) 1587 2686 916 SEGMENT 4 (ppm/C) 2686 3113 244 Charge Current: 500mA Termination Current: 50mA Standby Empty (V, I): 3.0V, 4mA
CALCULATED VALUE Full Active Empty Standby Empty
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Stand-Alone Fuel-Gauge IC with LED Display Drivers
Application Parameters
In addition to cell model characteristics, several application parameters are needed to detect the full and empty points, as well as calculate results in mAh units. 2.4% per 100 cycles of equivalent full capacity discharges. Partial discharge cycles are added to form equivalent full capacity discharges. The default estimation results in 88% capacity after 500 equivalent cycles. The estimated aging rate can be adjusted by setting AC to a different value than the cell manufacturer's rating. Setting AC to a lower value, accelerates the estimated aging. Setting AC to a higher value retards the estimated aging. AC is located in the parameter EEPROM block.
DS2788
Sense Resistor Prime (RSNSP)
RSNSP stores the value of the sense resistor for use in computing the absolute capacity results. The value is stored as a 1-byte conductance value with units of mhos. RSNSP supports resistor values of 1 to 3.922m. RSNSP is located in the parameter EEPROM block.
Age Scalar (AS)
AS adjusts the capacity estimation results downward to compensate for cell aging. AS is a 1-byte value that represents values between 49.2% and 100%. The LSB is weighted at 0.78% (precisely 2-7). A value of 100% (128 decimal or 80h) represents an unaged battery. A value of 95% is recommended as the starting AS value at the time of pack manufacture to allow learning a larger capacity on batteries that have an initial capacity greater than the nominal capacity programmed in the cell characteristic table. AS is modified by the cyclecount-based age estimation introduced above and by the capacity learn function. The host system has read and write access to AS, however caution should be exercised when writing AS to ensure that the cumulative aging estimate is not overwritten with an incorrect value. Typically, it is not necessary for the host to write AS because the DS2788 automatically saves AS to EEPROM on a periodic basis. (See the Memory section for details.) The EEPROM-stored value of AS is recalled on power-up.
Charge Voltage (VCHG)
VCHG stores the charge voltage threshold used to detect a fully charged state. The value is stored as a 1-byte voltage with units of 19.52mV and can range from 0 to 4.978V. VCHG should be set marginally less than the cell voltage at the end of the charge cycle to ensure reliable charge termination detection. VCHG is located in the parameter EEPROM block.
Minimum Charge Current (IMIN)
IMIN stores the charge current threshold used to detect a fully charged state. The value is stored as a 1-byte value with units of 50V and can range from 0 to 12.75mV. Assuming RSNS = 20m, IMIN can be programmed from 0 to 637.5mA in 2.5mA steps. IMIN should be set marginally greater than the charge current at the end of the charge cycle to ensure reliable charge termination detection. IMIN is located in the parameter EEPROM block.
Active Empty Voltage (VAE)
VAE stores the voltage threshold used to detect the active empty point. The value is stored in 1 byte with units of 19.52mV and can range from 0 to 4.978V. VAE is located in the parameter EEPROM block.
Capacity Estimation Utility Functions
Aging Estimation
As previously discussed, the AS register value is adjusted occasionally based on cumulative discharge. As the ACR register decrements during each discharge cycle, an internal counter is incremented until equal to 32 times AC. AS is then decremented by one, resulting in a decrease in the scaled full battery capacity of 0.78%. See the AC register description for recommendations on customizing the age estimation rate.
Active Empty Current (IAE)
IAE stores the discharge current threshold used to detect the active empty point. The unsigned value represents the magnitude of the discharge current and is stored in 1 byte with units of 200V and can range from 0 to 51.2mV. Assuming RSNS = 20m, IAE can be programmed from 0mA to 2550mA in 10mA steps. IAE is located in the parameter EEPROM block.
Learn Function
Since Li+ cells exhibit charge efficiencies near unity, the charge delivered to a Li+ cell from a known empty point to a known full point is a dependable measure of the cell capacity. A continuous charge from empty to full results in a "learn cycle." First, the active empty point must be detected. The learn flag (LEARNF) is set at this point. Second, once charging starts, the charge must
15
Aging Capacity (AC)
AC stores the rated battery capacity used in estimating the decrease in battery capacity that occurs in normal use. The value is stored in 2 bytes in the same units as the ACR (6.25Vh). Setting AC to the manufacturer's rated capacity sets the aging rate to approximately
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Stand-Alone Fuel-Gauge IC with LED Display Drivers DS2788
continue uninterrupted until the battery is charged to full. Upon detecting full, LEARNF is cleared, the chargeto-full (CHGTF) flag is set, and the age scalar (AS) is adjusted according to the learned capacity of the cell.
Result Registers
The DS2788 processes measurement and cell characteristics on a 3.5s interval and yields seven result registers. The result registers are sufficient for direct display to the user in most applications. The host system can produce customized values for system use or user display by combining measurement, result, and user EEPROM values. FULL(T): The full capacity of the battery at the present temperature is reported normalized to the +50C full value. This 15-bit value reflects the cell model full value at the given temperature. FULL(T) reports values between 100% and 50% with a resolution of 61ppm (precisely 2-14). Though the register format permits values greater than 100%, the register value is clamped to a maximum value of 100%. Active Empty, AE(T): The active empty capacity of the battery at the present temperature is reported normalized to the +50C full value. This 13-bit value reflects the cell model active empty at the given temperature. AE(T) reports values between 0% and 49.8% with a resolution of 61ppm (precisely 2-14). Standby Empty, SE(T): The standby empty capacity of the battery at the present temperature is reported normalized to the +50C full value. This 13-bit value reflects the cell model standby empty value at the current temperature. SE(T) reports values between 0% and 49.8% with a resolution of 61ppm (precisely 2-14). Remaining Active Absolute Capacity, RAAC [mAh]: RAAC reports the capacity available under the current temperature conditions at the active empty discharge rate (IAE) to the active empty point in absolute units of milliamp/hours (mAh). RAAC is 16 bits. Remaining Standby Absolute Capacity, RSAC [mAh]: RSAC reports the capacity available under the current temperature conditions at the standby empty discharge rate (ISE) to the standby empty point capacity in absolute units of mAh. RSAC is 16 bits. Remaining Active Relative Capacity, RARC [%]: RARC reports the capacity available under the current temperature conditions at the active empty discharge rate (IAE) to the active empty point in relative units of percent. RARC is 8 bits. Remaining Standby Relative Capacity, RSRC [%]: RSRC reports the capacity available under the current temperature conditions at the standby empty discharge rate (ISE) to the standby empty point capacity in relative units of percent. RSRC is 8 bits.
ACR Housekeeping
The ACR register value is adjusted occasionally to maintain the coulomb count within the model curve boundaries. When the battery is charged to full (CHGTF set), the ACR is set equal to the age-scaled full lookup value at the present temperature. If a learn cycle is in progress, correction of the ACR value occurs after the age scalar (AS) is updated. When an empty condition is detected (AEF or LEARNF set), the ACR adjustment is conditional. If AEF is set and LEARNF is not, the active empty point was not detected and the battery is likely below the active empty capacity of the model. The ACR is set to the active empty model value only if it is greater than the active empty model value. If LEARNF is set, the battery is at the active empty point and the ACR is set to the active empty model value.
Full Detect
Full detection occurs when the voltage (VOLT) readings remain continuously above the VCHG threshold for the period between two average current (IAVG) readings, where both IAVG readings are below IMIN. The two consecutive IAVG readings must also be positive and nonzero. This ensures that removing the battery from the charger does not result in a false detection of full. Full detect sets the charge-to-full (CHGTF) bit in the Status (STATUS) register.
Active Empty Point Detect
Active empty point detection occurs when the Voltage register drops below the VAE threshold and the two previous current readings are above IAE. This captures the event of the battery reaching the active empty point. Note that the two previous current readings must be negative and greater in magnitude than IAE, that is, a larger discharge current than specified by the IAE threshold. Qualifying the voltage level with the discharge rate ensures that the active empty point is not detected at loads much lighter than those used to construct the model. Also, active empty must not be detected when a deep discharge at a very light load is followed by a load greater than IAE. Either case would cause a learn cycle on the following charge-to-full to include part of the standby capacity in the measurement of the active capacity. Active empty detection sets the learn flag bit (LEARNF) in STATUS.
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Stand-Alone Fuel-Gauge IC with LED Display Drivers
Calculation of Results
RAAC [mAh] = (ACR[mVh] - AE(T) x FULL50[mVh]) x RSNSP [mhos] RSAC [mAh] = (ACR[mVh] - SE(T) x FULL50[mVh]) x RSNSP [mhos] RARC [%] = 100% x (ACR[mVh] - AE(T) x FULL50[mVh]) / {(AS x FULL(T) - AE(T)) x FULL50[mVh]} RSRC [%] = 100% x (ACR[mVh] - SE(T) x FULL50[mVh]) / {(AS x FULL(T) - SE(T)) x FULL50[mVh]}
DS2788
Status Register
The Status register contains bits that report the device status. The bits can be set internally by the DS2788. The CHGTF, AEF, SEF, LEARNF, and VER bits are read-only bits that can be cleared by hardware. The UVF and PORF bits can only be cleared through the 1Wire interface.
ADDRESS Field Bit
01h Format
BIT DEFINITION Allowable Values Charge Termination Flag Set to 1 when: (VOLT > VCHG) and (0 < IAVG < IMIN) continuously for a period between two IAVG register updates (28s to 56s). Cleared to 0 when: RARC < 90% Active Empty Flag Set to 1 when: VOLT < VAE Cleared to 0 when: RARC > 5% Standby Empty Flag Set to 1 when: RSRC < 10% Cleared to 0 when: RSRC > 15% Learn Flag--When set to 1, a charge cycle can be used to learn battery capacity. Set to 1 when: (VOLT falls from above VAE to below VAE) and (CURRENT > IAE) Cleared to 0 when: (CHGTF = 1) or (CURRENT < 0) or (ACR = 0**) or (ACR written or recalled from EEPROM) or (SLEEP Entered). Undefined Undervoltage Flag Set to 1 when: VOLT < VSLEEP Cleared to 0 by: User Power-On Reset Flag--Useful for reset detection, see text below. Set to 1 when: upon power-up by hardware. Cleared to 0 by: User Undefined
CHGTF
7
Read Only
AEF
6
Read Only
SEF
5
Read Only
LEARNF
4
Read Only
Reserved UVF
3 2
Read Only Read/Write*
PORF Reserved
1 0
Read/Write* Read Only
*This bit can be set by the DS2788, and can only be cleared through the 1-Wire interface. **LEARNF is only cleared if ACR reaches 0 after VOLT < VAE. Figure 14. Status Register Format
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Stand-Alone Fuel-Gauge IC with LED Display Drivers DS2788
Control Register
All Control register bits are read and write accessible. The Control register is recalled from parameter EEPROM memory at power-up. Register bit values can be modified in shadow RAM after power-up. Shadow RAM values can be saved as the power-up default values by using the Copy Data command.
ADDRESS Field NBEN Bit 7
60h Format Read/Write
BIT DEFINITION Allowable Values Negative Blanking Enable 0: Allows negative current readings to always be accumulated. 1: Enables blanking of negative current readings up to -25V. Undervoltage SLEEP Enable 0: Disables transition to SLEEP mode based on VIN voltage. 1: Enables transition to SLEEP mode if VIN < VSLEEP and DQ are stable at either logic level for t SLEEP. Power Mode Enable 0: Disables transition to SLEEP mode based on DQ logic state. 1: Enables transition to SLEEP mode if DQ is at a logic-low for t SLEEP. Read Net Address Op Code 0: Read net address command = 33h. 1: Read net address command = 39h. Display Control 0: Enables LED5 fuel-gauge display. 1: Enables LED4 fuel-gauge display. Undefined
UVEN
6
Read/Write
PMOD
5
Read/Write
RNAOP
4
Read/Write
DC Reserved
3 0:2
Read/Write
Figure 15. Control Register Format
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Stand-Alone Fuel-Gauge IC with LED Display Drivers
Special Feature Register
All Special Feature register bits are read and write accessible, with default values specified in each bit definition.
DS2788
ADDRESS Field Reserved Bit 1:7
15h Format Undefined
BIT DEFINITION Allowable Values PIO Sense and Control Read values: 0: PIO pin VIL 1: PIO pin VIH Write values: 0: Activates PIO pin open-drain output driver, forcing the PIO pin low. 1: Disables the output driver, allowing the PIO pin to be pulled high or used as an input. Power-up and SLEEP mode default: 1 (PIO pin is high-Z). Note: PIO pin has weak pulldown.
PIOSC
0
Read/Write
Figure 16. Special Feature Register Format
Fuel-Gauge Display
The DS2788 provides five open-drain drivers capable of sinking 30mA. These can be used to directly drive either 4 or 5 LEDs to display Remaining Active Relative Pack Capacity (RARC). The LEDs are enabled when the PIO is configured as an input and the PIO pin recognizes a rising edge. The display lights for 4s and then is disabled regardless of the state of the PIO pin. Further presses or releases of the PIO pin after the 100ms debounce delay causes the display to be enabled (the display does not light continuously if the button is held down). Table 2 summarizes how the LEDs are enabled. B signifies that the LED is blinking at a 50% duty cycle, 0.5s on, 0.5s off, to be repeated for the display time of 4s. L signifies the pin is pulled low, and the LED is lit. X signifies the pin is high impedance, and the LED is unlit.
Table 2. Fuel-Gauge Display Summary
CAPACITY RARC 10 20 25 40 50 60 75 80 100 5 LEDs, DC: 0 LED5-LED1 XXXXB XXXXL XXXLL XXXLL XXLLL XXLLL XLLLL XLLLL LLLLL 4 LEDs, DC: 1 LED4-LED1 XXXB XXXL XXXL XXLL XXLL XLLL XLLL LLLL LLLL
10 < RARC 20 < RARC 25 < RARC 40 < RARC 50 < RARC 60 < RARC 75 < RARC 80 < RARC
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Stand-Alone Fuel-Gauge IC with LED Display Drivers DS2788
EEPROM Register
The EEPROM register provides access control of the EEPROM blocks. EEPROM blocks can be locked to prevent alteration of data within the block. Locking a block disables write access to the block. Once a block is locked, it cannot be unlocked. Read access to EEPROM blocks is unaffected by the lock/unlock status.
ADDRESS Field Bit
1Fh Format
BIT DEFINITION Allowable Values EEPROM Copy Flag Set to 1 when: Copy Data command executed. Cleared to 0 when: Copy Data command completes. Note: While EEC = 1, writes to EEPROM addresses are ignored. Power-up default: 0 EEPROM Lock Enable Host write to 1: Enables the Lock command. Host must issue Lock command as next command after writing lock enable bit to 1. Cleared to 0 when: Lock command completes or when Lock command is not the command issued immediately following the Write command used to set the lock enable bit. Power-up default: 0 Undefined EEPROM Block 1 Lock Flag (Parameter EEPROM 60h-7Fh) 0: EEPROM is not locked. 1: EEPROM block is locked. Factory default: 0 EEPROM Block 0 Lock Flag (User EEPROM 20h-2Fh) 0: EEPROM is not locked. 1: EEPROM block is locked. Factory default: 0
EEC
7
Read Only
LOCK
6
Read/Write to 1
Reserved
2:6
BL1
1
Read Only
BL0
0
Read Only
Figure 17. EEPROM Register Format
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Stand-Alone Fuel-Gauge IC with LED Display Drivers
Memory
The DS2788 has a 256-byte linear memory space with registers for instrumentation, status, and control, as well as EEPROM memory blocks to store parameters and user information. Byte addresses designated as "Reserved" return undefined data when read. Reserved bytes should not be written. Several byte registers are paired into two-byte registers in order to store 16-bit values. The MSB of the 16-bit value is located at a even address and the LSB is located at the next address (odd) byte. When the MSB of a two-byte register is read, the MSB and LSB are latched simultaneously and held for the duration of the Read-Data command to prevent updates to the LSB during the read. This ensures synchronization between the two register bytes. For consistent results, always read the MSB and the LSB of a two-byte register during the same read data command sequence. EEPROM memory consists of the NV EEPROM cells overlaid with volatile shadow RAM. The Read Data and Write Data commands allow the 1-Wire interface to directly accesses only the shadow RAM. The Copy Data and Recall Data function commands transfer data between the shadow RAM and the EEPROM cells. To modify the data stored in the EEPROM cells, data must be written to the shadow RAM and then copied to the EEPROM. To verify the data stored in the EEPROM cells, the EEPROM data must be recalled to the shadow RAM and then read from the shadow RAM.
DS2788
User EEPROM
A 16-byte user EEPROM memory (block 0, addresses 20h-2Fh) provides NV memory that is uncommitted to other DS2788 functions. Accessing the user EEPROM block does not affect the operation of the DS2788. User EEPROM is lockable, and once locked, write access is not allowed. The battery pack or host system manufacturer can program lot codes, date codes, and other manufacturing, warranty, or diagnostic information and then lock it to safeguard the data. User EEPROM can also store parameters for charging to support different size batteries in a host device as well as auxiliary model data such as time to full charge estimation parameters.
Parameter EEPROM
Model data for the cells and application operating parameters are stored in the parameter EEPROM memory (block 1, addresses 60h-7Fh). The ACR (MSB and LSB) and AS registers are automatically saved to EEPROM when the RARC result crosses 4% boundaries. This allows the DS2788 to be located outside the protection FETs. In this manner, if a protection device is triggered, the DS2788 cannot lose more that 4% of charge or discharge data.
Table 3. Memory Map
ADDRESS (HEX) 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 Reserved STATUS: Status Register RAAC: Remaining Active Absolute Capacity MSB RAAC: Remaining Active Absolute Capacity LSB RSAC: Remaining Standby Absolute Capacity MSB RSAC: Remaining Standby Absolute Capacity LSB RARC: Remaining Active Relative Capacity RSRC: Remaining Standby Relative Capacity IAVG: Average Current Register MSB IAVG: Average Current Register LSB TEMP: Temperature Register MSB TEMP: Temperature Register LSB VOLT: Voltage Register MSB VOLT: Voltage Register LSB CURRENT: Current Register MSB CURRENT: Current Register LSB ACR: Accumulated Current Register MSB ACR: Accumulated Current Register LSB DESCRIPTION READ/WRITE R R/W R R R R R R R R R R R R R R R/W* R/W*
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Stand-Alone Fuel-Gauge IC with LED Display Drivers DS2788
Table 3. Memory Map (continued)
ADDRESS (HEX) 12 13 14 15 16 17 18 19 1A 1B 1C to 1E 1F 20 to 2F 30 to 5F 60 to 7F 80 to AD AE AF B0 B1 B2 to FF DESCRIPTION ACRL: Low Accumulated Current Register MSB ACRL: Low Accumulated Current Register LSB AS: Age Scalar SFR: Special Feature Register FULL: Full Capacity MSB FULL: Full Capacity LSB AE: Active Empty MSB AE: Active Empty LSB SE: Standby Empty MSB SE: Standby Empty LSB Reserved EEPROM: EEPROM Register User EEPROM, Lockable, Block 0 Reserved Parameter EEPROM, Lockable, Block 1 Reserved FVGAIN: Factory Voltage Gain MSB FVGAIN: Factory Voltage Gain LSB FRSGAIN: Factory Sense Resistor Gain MSB FRSGAIN: Factory Sense Resistor Gain LSB Reserved READ/WRITE R R R/W* R/W R R R R R R -- R/W R/W -- R/W -- R R R R --
*Register value is automatically saved to EEPROM during ACTIVE mode operation and recalled from EEPROM on power-up.
Table 4. Parameter EEPROM Memory Block 1
ADDRESS (HEX) 60 61 62 63 64 65 66 67 68 69 6A 6B 6C 6D 6E 6F DESCRIPTION CONTROL: Control Register AB: Accumulation Bias AC: Aging Capacity MSB AC: Aging Capacity LSB VCHG: Charge Voltage IMIN: Minimum Charge Current VAE: Active Empty Voltage IAE: Active Empty Current Active Empty 50 RSNSP: Sense Resistor Prime Full 50 MSB Full 50 LSB Full Segment 4 Slope Full Segment 3 Slope Full Segment 2 Slope Full Segment 1 Slope ADDRESS (HEX) 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7D 7E 7F DESCRIPTION AE Segment 4 Slope AE Segment 3 Slope AE Segment 2 Slope AE Segment 1 Slope SE Segment 4 Slope SE Segment 3 Slope SE Segment 2 Slope SE Segment 1 Slope RSGAIN: Sense Resistor Gain MSB RSGAIN: Sense Resistor Gain LSB RSTC: Sense Resistor Temp Coefficient COB: Current Offset Bias TBP23 TBP12 VGAIN: Voltage Gain MSB VGAIN: Voltage Gain LSB
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Stand-Alone Fuel-Gauge IC with LED Display Drivers
1-Wire Bus System
The 1-Wire bus is a system that has a single bus master and one or more slaves. A multidrop bus is a 1-Wire bus with multiple slaves. A single-drop bus has only one slave device. In all instances, the DS2788 is a slave device. The bus master is typically a microprocessor in the host system. The discussion of this bus system consists of four topics: 64-bit net address, hardware configuration, transaction sequence, and 1-Wire signaling. values and does not prevent a command sequence from proceeding as a result of a CRC mismatch. Proper use of the CRC can result in a communication channel with a very high level of integrity. The CRC can be generated by the host using a circuit consisting of a shift register and XOR gates as shown in Figure 19, or it can be generated in software. Additional information about the Dallas 1-Wire CRC is available in Application Note 27: Understanding and Using Cyclic Redundancy Checks with Dallas Semiconductor iButton Products (www.maximic.com/appnoteindex). In the circuit in Figure 19, the shift register bits are initialized to 0. Then, starting with the LSb of the family code, one bit at a time is shifted in. After the 8th bit of the family code has been entered, then the serial number is entered. After the 48th bit of the serial number has been entered, the shift register contains the CRC value.
DS2788
64-Bit Net Address
Each DS2788 has a unique, factory-programmed 1-Wire net address that is 64 bits in length. The first eight bits are the 1-Wire family code (32h for DS2788). The next 48 bits are a unique serial number. The last eight bits are a cyclic redundancy check (CRC) of the first 56 bits (see Figure 18). The 64-bit net address and the 1-Wire I/O circuitry built into the device enable the DS2788 to communicate through the 1-Wire protocol detailed in the 1-Wire Bus System section.
Hardware Configuration
Because the 1-Wire bus has only a single line, it is important that each device on the bus be able to drive it at the appropriate time. To facilitate this, each device attached to the 1-Wire bus must connect to the bus with open-drain or three-state output drivers. The DS2788 uses an open-drain output driver as part of the bidirectional interface circuitry shown in Figure 20. If a bidirectional pin is not available on the bus master,
CRC Generation
The DS2788 has an 8-bit CRC stored in the MSB of its 1-Wire net address. To ensure error-free transmission of the address, the host system can compute a CRC value from the first 56 bits of the address and compare it to the CRC from the DS2788. The host system is responsible for verifying the CRC value and taking action as a result. The DS2788 does not compare CRC
8-BIT CRC MSb
48-BIT SERIAL NUMBER
8-BIT FAMILY CODE (32h) LSb
Figure 18. 1-Wire Net Address Format
INPUT MSb XOR XOR LSb
XOR
Figure 19. 1-Wire CRC Generation Block Diagram iButton is a registered trademark of Dallas Semiconductor Corp., a wholly owned subsidiary of Maxim Integrated Products, Inc.
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Stand-Alone Fuel-Gauge IC with LED Display Drivers DS2788
separate output and input pins can be connected together. The 1-Wire bus must have a pullup resistor at the busmaster end of the bus. For short line lengths, the value of this resistor should be approximately 5k. The idle state for the 1-Wire bus is high. If, for any reason, a bus transaction must be suspended, the bus must be left in the idle state to properly resume the transaction later. If the bus is left low for more than 120s (16s for overdrive speed), slave devices on the bus begin to interpret the low period as a reset pulse, effectively terminating the transaction. The DS2788 can operate in two communication speed modes, standard and overdrive. The speed mode is determined by the input logic level of the OVD pin with a logic 0 selecting standard speed and a logic 1 selecting overdrive speed. The OVD pin must be at a stable logic level of 0 or 1 before initializing a transaction with a reset pulse. All 1-Wire devices on a multinode bus must operate at the same communication speed for proper operation. 1-Wire timing for both standard and overdrive speeds are listed in the Electrical Characteristics: 1-Wire Interface tables. * Function Command * Transaction/Data The sections that follow describe each of these steps in detail. All transactions of the 1-Wire bus begin with an initialization sequence consisting of a reset pulse transmitted by the bus master, followed by a presence pulse simultaneously transmitted by the DS2788 and any other slaves on the bus. The presence pulse tells the bus master that one or more devices are on the bus and ready to operate. For more details, see the 1-Wire Signaling section.
Net Address Commands
Once the bus master has detected the presence of one or more slaves, it can issue one of the net address commands described in the following paragraphs. The name of each ROM command is followed by the 8-bit op code for that command in square brackets. Figure 21 presents a transaction flowchart of the net address commands. Read Net Address [33h or 39h]. This command allows the bus master to read the DS2788's 1-Wire net address. This command can only be used if there is a single slave on the bus. If more than one slave is present, a data collision occurs when all slaves try to transmit at the same time (open drain produces a wired-AND result). The RNAOP bit in the Status register selects the op code for this command, with RNAOP = 0 indicating 33h and RNAOP = 1 indicating 39h.
Transaction Sequence
The protocol for accessing the DS2788 through the 1-Wire port is as follows: * Initialization * Net Address Command
VPULLUP (2.0V TO 5.5V) BUS MASTER 4.7k Rx 0.2A (TYP) Rx = RECEIVE Tx = TRANSMIT 100 MOSFET Rx DS2788 1-Wire PORT
Tx
Tx
Figure 20. 1-Wire Bus Interface Circuitry
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Stand-Alone Fuel-Gauge IC with LED Display Drivers
Match Net Address [55h]. This command allows the bus master to specifically address one DS2788 on the 1-Wire bus. Only the addressed DS2788 responds to any subsequent function command. All other slave devices ignore the function command and wait for a reset pulse. This command can be used with one or more slave devices on the bus. Skip Net Address [CCh]. This command saves time when there is only one DS2788 on the bus by allowing the bus master to issue a function command without specifying the address of the slave. If more than one slave device is present on the bus, a subsequent function command can cause a data collision when all slaves transmit data at the same time. Search Net Address [F0h]. This command allows the bus master to use a process of elimination to identify the 1-Wire net addresses of all slave devices on the bus. The search process involves the repetition of a simple three-step routine: read a bit, read the complement of the bit, then write the desired value of that bit. The bus master performs this simple three-step routine on each bit location of the net address. After one complete pass through all 64 bits, the bus master knows the address of one device. The remaining devices can then be identified on additional iterations of the process. See Chapter 5 of the Book of iButton Standards for a comprehensive discussion of a net address search, including an actual example (www.maxim-ic.com/ibuttonbook). Resume [A5h]. This command increases data throughput in multidrop environments where the DS2788 needs to be accessed several times. Resume is similar to the Skip Net Address command in that the 64-bit net address does not have to be transmitted each time the DS2788 is accessed. After successfully executing a Match Net Address command or Search Net Address command, an internal flag is set in the DS2788. When the flag is set, the DS2788 can be repeatedly accessed through the Resume command function. Accessing another device on the bus clears the flag, thus preventing two or more devices from simultaneously responding to the Resume command function.
Function Commands
After successfully completing one of the net address commands, the bus master can access the features of the DS2788 with any of the function commands described in the following paragraphs. The name of each function is followed by the 8-bit op code for that command in square brackets. Table 5 summarizes the function commands. Read Data [69h, XX]. This command reads data from the DS2788 starting at memory address XX. The LSb of the data in address XX is available to be read immediately after the MSb of the address has been entered. Because the address is automatically incremented after the MSb of each byte is received, the LSb of the data at address XX + 1 is available to be read immediately after the MSb of the data at address XX. If the bus master continues to read beyond address FFh, data is read starting at memory address 00 and the address is automatically incremented until a reset pulse occurs. Addresses labeled "Reserved" in the memory map contain undefined data values. The read data command can be terminated by the bus master with a reset pulse at any bit boundary. Reads from EEPROM block addresses return the data in the shadow RAM. A Recall Data command is required to transfer data from the EEPROM to the shadow. See the Memory section for more details. Write Data [6Ch, XX]. This command writes data to the DS2788 starting at memory address XX. The LSb of the data to be stored at address XX can be written immediately after the MSb of address has been entered. Because the address is automatically incremented after the MSb of each byte is written, the LSb to be stored at address XX + 1 can be written immediately after the MSb to be stored at address XX. If the bus master continues to write beyond address FFh, the data starting at address 00 is overwritten. Writes to read-only addresses, reserved addresses, and locked EEPROM blocks are ignored. Incomplete bytes are not written. Writes to unlocked EEPROM block addresses modify the shadow RAM. A Copy Data command is required to transfer data from the shadow to the EEPROM. See the Memory section for more details.
DS2788
______________________________________________________________________________________
25
Stand-Alone Fuel-Gauge IC with LED Display Drivers
Copy Data [48h, XX]. This command copies the contents of the EEPROM shadow RAM to EEPROM cells for the EEPROM block containing address XX. Copy data commands that address locked blocks are ignored. While the copy data command is executing, the EEC bit in the EEPROM register is set to 1 and writes to EEPROM addresses are ignored. Reads and writes to non-EEPROM addresses can still occur while the copy is in progress. The copy data command takes tEEC time to execute, starting on the next falling edge after the address is transmitted. Recall Data [B8h, XX]. This command recalls the contents of the EEPROM cells to the EEPROM shadow memory for the EEPROM block containing address XX. Lock [6Ah, XX]. This command locks (write protects) the block of EEPROM memory containing memory address XX. The lock bit in the EEPROM register must be set to 1 before the lock command is executed. To help prevent unintentional locks, one must issue the lock command immediately after setting the lock bit (EEPROM register, address 1Fh, bit 06) to a 1. If the lock bit is 0 or if setting the lock bit to 1 does not immediately precede the lock command, the lock command has no effect. The lock command is permanent; a locked block can never be written again.
DS2788
Table 5. Function Commands
COMMAND DESCRIPTION COMMAND PROTOCOL 69h, XX 6Ch, XX 48h, XX B8h, XX 6Ah, XX BUS STATE AFTER COMMAND PROTOCOL Master Rx Master Tx Master Reset Master Reset Master Reset BUS DATA Up to 256 bytes of data Up to 256 bytes of data None None None
Read Data Write Data Copy Data Recall Data Lock
Reads data from memory starting at address XX. Writes data to memory starting at address XX. Copies shadow RAM data to EEPROM block containing address XX. Recalls EEPROM block containing address XX to RAM. Permanently locks the block of EEPROM containing address XX.
26
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Stand-Alone Fuel-Gauge IC with LED Display Drivers DS2788
MASTER Tx RESET PULSE
DS2788 Tx PRESENCE PULSE
MASTER Tx NET ADDRESS COMMAND
33h/39h READ YES DS2788 Tx FAMILY CODE 1 BYTE
NO
55h MATCH YES MASTER Tx BIT 0
NO
F0h SEARCH YES DS2788 Tx BIT 0 DS2788 Tx BIT 0 MASTER Tx BIT 0
NO
CCh SKIP YES
NO
A5h RESUME YES
NO
CLEAR RESUME
RESUME FLAG SET? YES
NO
DS2788 Tx SERIAL NUMBER 6 BYTES
BIT O MATCH? YES MASTER Tx BIT 1
NO
NO
BIT O MATCH? YES DS2788 Tx BIT 1 DS2788 Tx BIT 1 MASTER Tx BIT 1
MASTER Tx FUNCTION COMMAND
MASTER Tx FUNCTION COMMAND
DS2788 Tx CRC 1 BYTE
CLEAR RESUME
BIT 1 MATCH? YES
NO
NO
BIT 1 MATCH? YES
MASTER Tx FUNCTION COMMAND
MASTER Tx BIT 63
DS2788 Tx BIT 63 DS2788 Tx BIT 63 MASTER Tx BIT 63
SET RESUME FLAG
YES
BIT 1 MATCH? NO CLEAR RESUME
Figure 21. Net Address Command Flowchart
______________________________________________________________________________________ 27
Stand-Alone Fuel-Gauge IC with LED Display Drivers DS2788
1-Wire Signaling
The 1-Wire bus requires strict signaling protocols to ensure data integrity. The four protocols used by the DS2788 are as follows: the initialization sequence (reset pulse followed by presence pulse), write-0, write-1, and read data. All these types of signaling except the presence pulse are initiated by the bus master. Figure 22 shows the initialization sequence required to begin any communication with the DS2788. A presence pulse following a reset pulse indicates that the DS2788 is ready to accept a net address command. The bus master transmits (Tx) a reset pulse for tRSTL. The bus master then releases the line and goes into receive mode (Rx). The 1-Wire bus line is then pulled high by the pullup resistor. After detecting the rising edge on the DQ pin, the DS2788 waits for tPDH and then transmits the presence pulse for tPDL. between cycles. The DS2788 samples the 1-Wire bus line between 15s and 60s (between 2s and 6s for overdrive speed) after the line falls. If the line is high when sampled, a write-1 occurs. If the line is low when sampled, a write-0 occurs (see Figure 23). For the bus master to generate a write-1 time slot, the bus line must be pulled low and then released, allowing the line to be pulled high within 15s (2s for overdrive speed) after the start of the write-time slot. For the host to generate a write-0 time slot, the bus line must be pulled low and held low for the duration of the write-time slot.
Read-Time Slots
A read-time slot is initiated when the bus master pulls the 1-Wire bus line from a logic-high level to a logic-low level. The bus master must keep the bus line low for at least 1s and then release it to allow the DS2788 to present valid data. The bus master can then sample the data tRDV from the start of the read-time slot. By the end of the read-time slot, the DS2788 releases the bus line and allows it to be pulled high by the external pullup resistor. All read-time slots must be t SLOT in duration with a 1s minimum recovery time, t REC , between cycles. See Figure 23 for more information.
Write-Time Slots
A write-time slot is initiated when the bus master pulls the 1-Wire bus from a logic-high (inactive) level to a logic-low level. There are two types of write-time slots: write-1 and write-0. All write-time slots must be tSLOT in duration with a 1s minimum recovery time, t REC ,
tRSTL
tRSTH
tPDH
tPDL PK+
DQ PK-
LINE TYPE LEGEND: BUS MASTER ACTIVE LOW RESISTOR PULLUP DS2788 ACTIVE LOW
Figure 22. 1-Wire Initialization Sequence
28
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Stand-Alone Fuel-Gauge IC with LED Display Drivers DS2788
WRITE-0 SLOT tSLOT tLOW0 tREC VPULLUP tLOW WRITE-1 SLOT tSLOT
GND
MIN MODE: STANDARD 15s
DS2788 SAMPLE WINDOW TYP MAX 30s
> 1s MIN 15s
DS2788 SAMPLE WINDOW TYP MAX 30s
15s
15s
OVERDRIVE
2s
1s
3s
2s
1s
3s
READ-0 SLOT tSLOT tREC VPULLUP
READ-1 SLOT tSLOT
GND > 1s MASTER SAMPLE WINDOW tRD tRD MASTER SAMPLE WINDOW
LINE TYPE LEGEND: BUS MASTER ACTIVE LOW BOTH BUS MASTER AND DS2788 ACTIVE LOW DS2788 ACTIVE LOW RESISTOR PULLUP
Figure 23. 1-Wire Write- and Read-Time Slots
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29
Stand-Alone Fuel-Gauge IC with LED Display Drivers DS2788
Typical Operating Circuit
PK+ 5V REGULATOR
DISPLAY LED1 LED2 LED3 LED4 LED5 150 DATA 5.6V RSNS PKDQ SNS PIO VDD (N - 1) R N-CELL Li+ BATTERY
DS2788
VMA VIN OVD DVSS VSS 0.1F R PROTECTION CIRCUIT
Package Information
(For the latest package outline information, go to www.maxim-ic.com/DallasPackInfo.) PACKAGE TYPE 14 TSSOP DOCUMENT NO. 56-G2015-000
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
30 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2007 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.


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